1. Field
Embodiments discussed herein relate to the layout design of a semiconductor integrated circuit.
2. Description of Related Art
During a thermal analysis, the temperature of each of cells included in the layout data of a circuit is analyzed to specify an area of which temperature becomes equal to and/or higher than a specified temperature in the layout data. A timing analysis is performed based on a result of the thermal analysis.
Related technologies are disclosed in Japanese Laid-open Patent Publication No. 2001-168200, Japanese Laid-open Patent Publication No. H9-26983, Japanese Laid-open Patent Publication No. H10-134093, etc.